Physicist, Telecom Engineering lover, HPC Enthusiast. Prog Rock/Metal fan.

Joined December 2017
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Researchers have developed a new simulator to predict the throughput of basic blocks of all Intel Core μarchs released in the last decade, demonstrating to be more accurate than the predictions of state-of-the-art tools by more than an order of magnitude. arxiv.org/pdf/2107.14210.pdf
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In this week, an Intel patent application was published, revealing its proposed Cross-Batch Memory (XBM), an ultra high-bandwidth memory that offers some significant improvements over the current standard, which could be a direct competitor to HBM4 in the near future.
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Patent: Ultra High Bandwidth Memory With Backend Transistors - Intel Intel High Bandwidth Memory with UCIe links... More details: freepatentsonline.com/202601…
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The basic ideia of XBM replaces HBM ultra-wide parallel interface with 32 GT/s UCIe links, enabling chiplet-native integration and simpler packaging, reducing production costs. XBM also proposes backend 1T1C DRAM and fine-grained datablock-level redundancy for fault recovery.
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Happy Independence Day!!! 🦊✨ #IndependenceDay
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In this paper is proposed WattGPU, a method for predicting the inference power draw and latency of LLM-GPU pairs that, once trained, requires zero hardware access or profiling, leveraging only publicly available metadata. arxiv.org/pdf/2607.02391
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Salesforce researchers have proposed a memory-efficient training stack for MoE models that specializes a different parallelism strategy for each component of the MoE block, choosing for each one the sharding axis that matches its dominant bottleneck. arxiv.org/pdf/2607.01844
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I'm sorry to say, but contrary to the dichotomy presented, the world is much closer to Ayn ​​Rand's 1957 novel, "Atlas Shrugged." In the end, we are all apathetically looking at each other and questioning, "Who is John Galt?" When we finally find the answer, it may be too late.
America will either collapse into a Communist hellscape whose leaders are pupetted by the CCP or flourish and become a 1000 year interplanetary empire that builds a Dyson Swarm and colonizes Mars. No middle ground.
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The evaluation results show that the proposed approach can save up to 76% of link resources with comparable frequency and only 3% router area overhead relative to the multiplane design.
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In this paper is proposed a novel lightweight Virtual Channel (VC) router design for deadlock-free AXI4 traffic separation which preserves the resource parsimony of VCs while approaching the area and timing characteristics of multiplane router designs. arxiv.org/pdf/2607.01430
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The results show that agents often fix reported examples but under- or over- generalize relative to golden patches. Overall, effective automated compiler patching requires domain-specific historical knowledge to turn concrete reports into semantically well-scoped patches.
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In this paper is presented an empirical study of agent-based LLVM missed-optimization patching, focusing on whether generated patches match developers’ intended generalization scope. arxiv.org/pdf/2607.02370
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The proposed method sustains 4.7–8.2× higher per-GPU throughput than the best-tuned FSDP2 baseline and keeps training at context lengths up to 1M tokens, enabling lossless trillion-parameter training at near-million-token context on just under twelve 8×H200 nodes.
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Compared to standard physically grounded baselines, the proposed models reduce median absolute percentage error by approximately 4× on unseen LLM-GPU combinations for server scenarios or approximately 2× for completely unseen GPUs.
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The tests across 42 LLMs and 8 GPUs from different architectures show that both models achieve median absolute percentage errors on unseen GPUs of ≤3.4% for offline and ≤13.5% for server scenarios for mean power draw and ≤8.5% for ITL in server scenarios.
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WattGPU introduces two predictive models for LLM inference characterization: mean GPU power draw and Inter-Token Latency (ITL). Both models rely exclusively on publicly available LLM metadata and GPU manufacturer specifications.
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